Technical Field
The present invention generally relates to semiconductor device fabrication and, more particularly, to selective nitridation of a dummy gate to prevent shorting between contacts.
Description of the Related Art
When gate cut last processes are used and silicon nitride is deposited to fill the gap, problems can arise in the middle-of-line (MOL). In particular, structures are formed in the gate cut, which can be quite narrow. Existing processes form, for example, contacts and power rails in a silicon nitride filler that is in contact with the gate. When contacts are formed through this silicon nitride filler, it is possible to over-etch the material and breach the lining such that, for example, the power rail can short-circuit to the gate. This decreases device yield and device reliability.
Other structures use a silicon nitride liner around only the gate. However, this structure is generally formed using an anisotropic etch to remove excess liner material from horizontal surfaces of the device. Such an etch will remove some material from the vertical portions of the liner as well, resulting in a tapered profile and a thinner liner at the top of the gate. This thinned liner is susceptible to short circuits to, e.g., a nearby power rail.